Non-volatile memory such as erasable programmable read-only memory (EPROM) and electrically-erasable programmable read-only memory (EEPROM) are extensively used for storing data in computer systems. EPROM and EEPROM comprise a large number of memory cells having electrically isolated gates (floating gates). Data is stored in the memory cells in the form of charge on the floating gates. Charge is transported to or removed from the floating gates by programming and erase operations, respectively.
Another type of non-volatile memory is flash memory. Flash memory is a derivative of EPROM and EEPROM. Although flash memory shares many characteristics with EPROM and EEPROM, current generation of flash memory differs in that erase operations are done in blocks.
A typical flash memory comprises a memory array which includes a large number of memory cells arranged in row and column fashion. Each of the memory cells includes a floating gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed in a random basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge in the floating gate.
A conventional method of programming (or writing) a selected cell includes applying programming voltages, about 12V, to the gate of the transistor, and about 6V to the drain while the source is grounded. During programming of a selected cell in a flash memory comprising shared wordlines and bitlines, it is desirable that adjacent non-selected cells are not disturbed. However, the disturb condition often occurs since the non-selected cells, sharing the same wordline or the same bitline with the selected cell, also receive the programming voltage. The programming voltages on the wordline or the bitline of the non-selected cells cause changes in differential voltages between the gates, the sources and the drains of the field-effect transistors. The changes in the differential voltages disturb the electric fields in the transistors and, hence, disturbs the stored charge in the non-selected cells. A typical flash memory undergoes many programming cycles (at least 100,000 cycles) during its life time of approximately ten years. If the disturb condition is not reduced or corrected, at one point, the cells would not function properly and could give an inaccurate reading.
A method of reducing the disturb condition in a flash memory is disclosed in U.S. Pat. No. 5,317,535 and assigned to Intel Corporation. The Intel patent shows a method of reducing disturb condition by applying an inhibit voltage of 2.5V to the sources of non-select cells sharing the same wordline with the selected cell during programming. The inhibit voltage reduces the gap of the gate-to-source voltage of non-selected cells, and consequently reduces the disturb condition. In addition, the flash memory of the U.S. Pat. No. 5,317,535 patent is designed with shared wordlines spanning across the blocks of the memory.
In an alternate flash memory design where shared bitlines span across the blocks of the memory, a high programming voltage applied on a bitline of a selected cell during a programming operation could disturb the threshold voltages of adjacent non-selected programmed cells in non-selected blocks and cause the non-selected programmed cells to lose charge. And in some cases, the charge loss may be sufficient for the non-selected programmed cells to read as erased cells. In some other cases, this charge loss may slow down the read operation due to reduced margin. For the reasons set forth above, it will be recognized that there is need for a method to reduce the disturb condition during programming a flash memory with shared bitlines.